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The actual computer is [purportedly] available at the linked website: http://lotharek.pl/product.php?pid=96
This supports more than just the Amiga and ST. Better page here http://lotharek.pl/product.php?pid=96
It's (kind of) unacceptable that this has VGA out instead of HDMI. What were they thinking?
The upcoming Mega65 project plans to have HDMI output (including very high resolution output). It only plans to support C64 and C65 images at launch, as far as I know, so isn't really comparable (but will be based on a more powerful FPGA, and seems like it will ship in an amazing C65 inspired case): http://mega65.org

The FPGA it runs on is pretty pricey, though, at ~$320 (from what I can tell), so I haven't bothered trying to run the images yet. I'll likely wait until the hardware exists, and then spend way too much money to have a real looking/acting C65 that also happens to work as a C64. I suspect Amiga and ST bitstreams will eventually show up, as well, since lots of work has already been done there on other FPGAs.

I am not all that interested in emulation (whether hardware or software), and have somewhat limited interest in retro computing (I own a Commodore 64 and a GameBoy for music composition, but long ago sold all of my Amigas and other stuff), but the C65 holds a special place in my heart (and, I imagine that of many C64 kids). It's like a piece of alternate history. Apple fans got the IIGS, but C64 lovers never got our next generation. The C65 would have been that next generation, had it ever gone past the prototype stage.

VGA is much easier to generate on an FPGA. Also, the project is a few years old.
What makes that so? Do most FPGAs lack serial outputs that could generate HDMI/DVI signals? It seems to me that VGA would be harder since you need a DAC.
Unless you need considerable precision, "a DAC" = a handful of resistors. The original ST and Amiga only had 3 and 4 bits per channel, respectively, which don't especially demand a "real" DAC.

And if I remember correctly, most FPGAs of that generation and market segment do have differential outputs (though probably not SERDES hard blocks), but can't quite pull off proper HDMI/DVI without an external encoder chip. There might be some way to hack a "good enough" signal for lower bitrates, but if you're going to need to half-ass the signal either way, you might as well go with the simple analog link and not the complex digital one.

Common FPGAs are limited to sup-GHz speeds. Common DACs (afaik) are parallel, letting them be driven at lower clock speeds than equivalent serial digital devices.

1920 x 1080 x 24bpp x (10/8 due to TMDS 8b/10b encoding) 60hz ~= 3.5 gigabits a second, / 3 (3 data lines in DVI/HDMI) = just over a gigabit per data line, plus surely some overhead that I don't know about. I'm not an EE but it sounds like it would be hard to generate a >1GHz signal on a <1GHz FPGA.

Whereas with an analog signal driven by 3 8-bit DACs, you're dealing just dealing with 1920 x 1080 x (VGA overhead) * 60hz = a 120~ megahertz signal that can easily be generated by any FPGA. (the 24bpp is irrelevant because it is being transferred in parallel)

What (I think) I know of the subject:

For a resolution of "1920 x 1080 @ 60Hz" the FPGA needs to run only at the pixel clock's frequency, which is "only" 124.416 MHz (1920x1080x60 / (10^6)). Then on every pixel clock cycle, the FPGA needs to present each bit of what makes-up-a-pixel on it's output pins. In case of 24bpp, that would require 24 dedicated output pins. In addition, a dedicated DVI transmitter chip would be required to serialize and encode that 24 wide bus to those DVI-compliant three differential signal lines in addition to doing the 8b/10b encoding. Roughly.

Or the FPGA could have a high-speed serializer built-it which could replace the dedicated chip.

~sigh~ I wish I knew enought about electronics to play around designing such a serializer, it tickles my fancy :)

The Parallella board has an HDMI transmitter connected to the FPGA, it uses the same generation of FPGA as the Mega65 that is described elsewhere in the thread.
It's not even that high resolution. https://github.com/mist-devel/mist-board/wiki/Displays

Remember the original hardware being emulated targeted PAL TVs: 576 lines @ 50Hz.

Lower resolution HDMI is certainly feasible, but you have to care more about the signal integrity when designing the board, and it's harder to debug: http://www.fpga4fun.com/HDMI.html

True, but the upscaling hardware in most monitors and especially TVs sucks and adds extra frame(s) of latency, so ideally you'd upscale the picture on the FPGA to the display's native resolution (or at least something common like 1080p) to get the best quality (pixel doubling if possible) and lowest latency (a scanline or two) possible.

Something I didn't consider when I posted was that a lot of people will want to use this with a VGA CRT, especially since there is lots of Amiga software (including the Workbench itself) that changes the pixel clock midframe, which would pretty much require upscaling hardware to produce a signal that a modern LCD would accept. VGA+a CRT requirement becomes a much simpler solution in light of this.

I always found one of the more interesting posts[1] on the Green Arrays eval board, was the one about VGA output:

http://www.colorforth.com/video.htm

Also see: [1] http://www.colorforth.com/haypress.htm which is in reverse chronological order.

unacceptable is rather a strong word for criticism of a free hobby project. Consider "inconvenient".