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Hackaday project owner here...
The idea of the project is the fun of playing around with electronics, something I have not done before, and trying to understand everything about a real computer. Starting with the CPU and then building it out with a simple graphics card. After that create an assembler/compiler for RISC-V and write a small OS. Yes, all of these will be relatively simple and not of a commercial standard, but building a machine and watching it run with all the hardware and software written from scratch is the longer term goal.
> building a machine and watching it run with all the hardware and software written from scratch is the longer term goal.
This is an awesome & crazy project! I'll be watching. Would love to read a little bit about how much time it's taking as you go, and how it balances against your work & life.
Ever since I was an undergrad many moons ago, I thought a 4-year CS degree that ran on this same premise would be amazing. Say, spend your first year learning hardware logic and building a CPU. Year 2 is a basic operating system & compiler. Year 3 networking & a graphics system, and year 4 maybe a game or application or research project of the student's choice. Or something like that. Wouldn't it be cool to graduate having built your own computer from the ground up?
A couple points. First you could use surface mount ICs and fit a whole lot more circuitry onto one board. Soldering is harder but it should be better in every other way.
Second. The register file could be implemented with far fewer chips if only a single output was used. The A and B register select bits would need to go through a quad 2-1 multiplexor and the output would need to be latched for either A or B and some sequencing logic added to make it work. In other words it would take 2 cycles to read from both A and B operands.
Oh, and don't forget that in RISC-V register 0 is always read as zero so no actual storage is needed for that one.
Once you get over the initial effort of switching to surface mount and get a toaster oven/griddle setup, it can actually be quite a lot faster, especially for doing stuff in quantity. Using a stencil you can quickly place paste for all components, then hand place all components and bake it. Of course finding solder bridges and debugging can become a bit tricky...
In other words it would take 2 cycles to read from both A and B operands.
Or you could read one register on the rising and the other on the falling edge of the clock, if timing permits. A lot of real microprocessors were designed with this techinque.
Did you consider using KiCAD or another open EDA tool instead of Eagle?
Have to admit I never heard of those two tools! Given I use PCBWay for cheap production of boards I can only create boards that are 100m x 100m at a max anyway. So the Eagle restriction of free use up to 100m x 80m is not bad.
cool project.. I'm curious about your experience working with China PCB manufacturer. The costs seem low from my experience ($10 for 10 boards + $25 shipping). Was the quality there? How fast was the shipping? Did you attempt any homebrew PCB etching?
I'm not the author, but I've etched my own boards. My graduate thesis project contained a couple dozen homebrew boards by the time all was said and done.
I used a photo-resist process based on transparencies that I made in the department Xerox machine.
The biggest improvement in moving to real manufactured boards was plated-through holes. For that reason alone, I wouldn't go back. Not only are boards easier to route with PTH's, but they are also more robust -- it's harder to lift a pad off the board when removing a component.
Solder mask is a boon as well, especially for surface mount.
Dirtypcbs[1] did a bang up job with amazingly fast turn around. Even got 4 extra boards; we used them for our alienflight[2] builds.
[1]: http://www.dirtypcbs.com [2]: https://www.youtube.com/watch?v=6LCuZCmttIQ
I have ordered from them 3 times and each time they arrived in ~1 week to Australia. Takes 2 or 3 days for them to be made and then another 3 or 4 days to be delivered by DHL. I have not had problems with any boards so far. I have never ordered from anyone else so I have no idea how they compare to others but for a home project with simple designs they are just fine. You can combine orders for several different boards into a single postage so it becomes even better value.
I ordered several times from shenzhen2u. I had a few questions and some issues at first with their store. I always got a friendly (and useful) answer within 24 hours. Actually better answers, than what I got in Europe (some of them very expensive in comparison). Quality for my requirements was always better than expected. E.g. I made several boards for a Raspberry Pi and the through holes were all fine (on all boards). I had zero issues to put them on top of the 2 x 20 header of the Raspberry Pi.
This is great! I remember as a teenager back in the 80s I built a 4-bit CPU (actually, not much more than an ALU really) using 74-series chips I'd salvaged in part from old mainframe boards I found at my local scrapyard.
I loved inventing the instruction set, which made me realise why opcodes are encoded the way they are. Probably one of the best learning experiences I ever had.
Fantastic. I'll follow this with great interest, I've had the same urge to make my own 'relatively simple everything' for years, but not even close to this (already) in execution.
This is neat. I'm looking forward to reading updates.
I took the MITx MOOC version of MIT's 6.004 (Computation Structures) class. In that class students design and implement in logic gate level simulator a 32-bit RISC CPU.
I was going to try to build it out of 74' series logic as a summer project last summer. Then I did a count of the gates I was using. In the following, a number after a gate type means the number of inputs. My gate count:
295 AND2
8 AND3
3 NOR2
4 OR2
96 OR3
20 OR4
226 XOR2
6 NOT
563 MUX2
161 MUX4
32 D FLIP FLOPS
In terms of chips, it is something like
140 4xMUX2
75 4xAND2
81 2xMUX2
55 4xXOR2
The project pretty much died at that point.
I could cut a lot of those out by moving some functions from hardware to software. My design includes a shifter than can left or right, logical or arithmetic shift 1 to 32 bits in one cycle. 353 of the MUX2s are involved in that.
I could take that out, add a much simpler unit that can only do logical right shift by 1, add a new shift instruction that uses that simpler shifter, and make the current shift instruction into illegal instructions. They would then trap, and the illegal instruction handler could emulate the missing instructions.
Still too many chips after that, though.
I may still build it someday, but rather than making it out of real chips I'll use it as an excuse to learn about FPGAs.
If any of this seems interesting, I highly recommend 6.004 at MITx.
In that class students design and implement in logic gate level simulator a 32-bit RISC CPU.
Is that an euphemism to avoid saying "MIPS"? ;-)
One way to really cut down on hardware (and speed) is to use a bit-serial design, as found on some minicomputers in the 70s. Memory elements like registers still need the full width, but by processing only 1 bit at a time, many of the other components in the datapath can be reduced by a factor of 32. You can also get left and right shifts for "free" since that's intrinsic in the design. Another strategy is to use microcode to break down instructions even further, e.g. reuse the ALU to do address calculations and incrementing the instruction pointer.
It's an ISA called Beta. It's based off of Alpha. See specification: https://6004.mit.edu/handouts/beta.pdf.
In that class students design and implement in logic gate level simulator a 32-bit RISC CPU.
6.004 is a ton of fun. If you want to build something, I recommend a CISC-like multi-cycle design that uses micro-code (or a hardware sequencer) to dramatically reduce the HW costs (pdf warning):
http://inst.eecs.berkeley.edu/~cs152/sp13/handouts/microcode...
And it could still run a RISC ISA like Beta or RISC-V.
A group of students did build a TTL version of the Beta processor many years ago. Unfortunately, the web being what it is I can't find stuff about previous years of the 6.004 course so I can't give a proper reference.
Anyway, this project won't be the first 32 bit homebrew TTL processor. But it seems it will be able to claim to be the first still on the web :-(
I'm lucky enough to say this was my day job in the 1980's. The sad thing is that today the TTL catalog is much thinner, so it is actually harder to do today than it was then. I'm happy to see RISC-V getting so much traction with serious builders. It seems like the most viable path to hardware freedom right now.
The 74 logic family is gone, because it's been fully obsoleted by newer logic families (especially 74LS and 74HC). The vast majority of parts from the 74 family are available in these families, which generally have compatible behavior, equivalent or higher speed, and much lower power draw.
There are some old parts from the 74 family which were never brought over (like the 7447 seven-segment decoder), but all of the basic logic parts are still around.
Most specialty (in the higher up numbers there are quite a lot of these) parts only existed in a single family anyway. But basic stuff, muxes, dividers, registers/drivers etc. all made it to HCMOS :)
RISC-V isn't about hardware freedom, but about an open ISA that anyone can implement, including those who will make proprietary implementations.
The fact that RISC-V is not motivated by hardware freedom is not in conflict with my statement that it is a beacon of light on the road to hardware freedom. Both can be simultaneously true.
Hardware freedom will become increasingly important in the future, and I predict it will be harder to achieve that software freedom.
That sounds like it would have been very interesting! Back in the 70's it wasn't an uncommon "hobby project" to build a very simple "CPU" using TTL parts. While the computational utility was obviously limited it was a great learning exercise.
I remember working out the logic of "JK" flip-flops and the like. At one time I'd acquired some ancient vacuum tube versions of said flip-flops. Wish I'd kept them, they'd be a great curiosity today, a collector's item of sorts.
Should evoke some good memories looking through the catalogs of current versions of those venerable products. Won't be surprising if they'll be around for a long time into the future.
What do you mean by the TTL catalog is much thinner?
TTL = transistor transistor logic
This is the technology in the common 74' series integrated circuits that became popular in the late 1960's and 1970's. You can get basic IC's that perform AND, NOT, XOR operations but also more complex IC's that perform as multiplexors, buffers, registers and so forth. You can find these in computers like the PDP or VAX series machines.
They are not used as much today and so less of them are still manufactured.
Many, many of my favorite 74' parts from the old days are no longer made. The MSI parts that were bread-and-butter of this kind of design back then make less-than-zero economic sense any more. Nobody would design them in, so nobody makes them.
Today you can get the basic logic, of course, because a little bit of glue and duct tape is still necessary. And the super basic shift registers and I/O buffers are still useful. But all computation has moved into much more highly integrated chips or FPGAs.
This is important as any 32 bit design is already going to be a big project, so lets not make it impossible by going for something like the CISC of the 80386!
From a practical standpoint, going with 32-bit over 16-bit means not much more than making the datapath twice as wide --- which increases area but not actual complexity per se. And seeing a discrete i386 would actually be pretty interesting, especially if implemented on top of this one as an x86-to-RISCV uop-based decoder like the original P5.
Here's another well-known one, although it's 16-bit and uses a custom ISA (but its creator ported a whole OS to it):
> From a practical standpoint, going with 32-bit over 16-bit means not much more than making the datapath twice as wide
Actually, that is more true from a theoretical standpoint.
From a practical standpoint you have twice as many traces to fit on your board and route, you have more chips, higher power requirement, etc.
Last time I was playing with 74 series chips I kept wishing there was a Verilog or VHDL library with impementations of all the common 74 series chips (complete with the proper pinouts and timings etc), so one could do a full working simulation of the circuit before going ahead and breadboarding it or laying out a PCB.
It's not VHDL or Verilog, but SPICE tools are what you are looking for.
LTSpice is free, and quite good: http://www.linear.com/designtools/software/#LTspice
A good tutorial page: http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice.htm
LTWiki page on component libraries, Bordodynov's library in particular contains lots of 74HC and 74HCT series chips: http://ltwiki.org/?title=Components_Library
Appraise for the effort. But I do not know why anybody did this kind of tedious job. Isn't it enough to do with Verilog / VHDL to fully understand basic architecture of CPU?
In my view, it depends on what you get your pleasure from. Taking something from model to metal invokes a certain crazy satisfaction that's hard to describe. I've built things that didn't really need to be built, for this reason.
The toolchain for a 7400 series project is very different from an FPGA. That's a bit obvious of course, but compare them... With an FPGA you have a giant proprietary software package, with some incredibly powerful tools at your disposal. They're damn useful, and they're fast, but the focus is on learning how to describe your design to Xilinx ISE or whatever, and you have to learn the software so you can use its testbench facilities to validate your design, etc.
With discrete logic, the design can be done on paper and with standard EDA tools, and you can prototype it and test and build it on your workbench, and all the signals are exposed so you can inject and probe signals with standard test equipment.
I like the discrete logic approach because it feels more tangible and it's fun from an electronics tinkering perspective. But the FPGA method is for sure gonna be faster and smaller and cheaper, you just have to do all the work in software.
Depends on the experience you want in your hobby project, I guess. :)
> So creating it as a big breadboard project is out the window. No. We need to create some actual proper PCB designs that can then be connected together in a modular fashion.
Before you write off prototyping large sections on breadboards, I highly recommend you take a look at the Vulcan-74:
I've followed that thread for a long time. He keeps changing direction, which is unfortunate. His breadboarding technique is quite amazing -- I tried copying his approach and my fingers just can't do it :-)
Building a cpu using 74 series logic was a required project in our undergraduate micro-architecture course. It was a fun time debugging the bread boards! First time we learnt the fact that voltage at one end of bread board to the other drops due to resistance so 5V gates do not work if power supply is not connected close enough.
I know a startup that wasted $10mm (and precious time to market) because of a similar issue. They wish they'd learned this lesson much earlier!
Would it be worth faking parts you haven't gotten to yet? Have boards with the correct connectors for higher level components and simulate using off the shelf microcontrollers.
This would allow system level testing, and get to a working device sooner. Over time migrate everything to TTL
Quinn Dunki did something like that when building her "Veronica" 68k computer. IIRC the VGA output remains AVR-based. Seems like a good way to go, provided you don't get bogged down in timing constraints.
If you just need to test a unit (and don't need full functionality), a nice logic analyzer works well... I have an HP 16700A with pattern generator, which I can use to simulate just about anything (more or less.. sometimes it's a bit cumbersome to use.)
Timing could be difficult, might not end up actually saving any (calendar) time.
I am not part of the FSF, but this probably would qualify for the FSF's certified device program if the full blue prints were made available.
Unlikely, since the designs are only editable in the proprietary Eagle EDA tool.
I actually just started breadboarding an 8-bit CPU inspired by Ben Eater's project of the same nature [0]. The book he makes reference to "Digital Computer Electronics" by Malvino provides plans for a complete 'Simple As Possible' CPU using 74LS chips.
[0] https://www.youtube.com/playlist?list=PLowKtXNTBypGqImE405J2...
Can anybody estimate roughly how big can this end up physically, and how fast it can get in clock Hz or (better?) ops Hz? Also, how many discrete components it might take?
I find myself wondering if the final result will be anything like the Xerox Alto.