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> Today, 99% of 32-bit and 64-bit processors are RISC

> Concluding this historical review, we can say the marketplace settled the RISC-CISC debate; CISC won the later stages of the PC era, but RISC is winning the post-PC era

It is clear that his assessment is right, but isn't the 99% number too high ? Servers, laptops and desktops still run x86 and they are CISC ( unless you are counting x86 as RISC based on microcode )

> Many researchers assume they must stop short because fabricating chips is unaffordable. When designs are small, they are surprisingly inexpensive.

> High-level, domain-specific languages and architectures, freeing architects from the chains of proprietary instruction sets, along with demand from the public for improved security, will usher in a new golden age for computer architects. Aided by open source ecosystems, agilely developed chips will convincingly demonstrate advances and thereby accelerate commercial adoption.

It will be interesting if manufacturing also gets open sourced. There already seems to be a project attempting this : http://libresilicon.com/

There's an x86 processor in your desktop, but there are many more RISC processors doing things like controlling your hard drive. If you buy an AMD processors there's even an ARM core inside the x86 processor in the Platform Security Processor.

Add in all the microwaves, routers, the many processors in your car, and so on and 99% seems a bit high to me but not unreasonable.

Seems disingenuous though, as the two markets have totally different optimization points and volumes. More like RISC has won the low-cost, low-power market, and CISC-RISC hybrids won the performance market, or something like that.

I'm sure you can think of a million other markets like this- sedans vs race cars, fighter jets vs puddle jumpers, etc.

It's really a lot more than two markets. The high end communications systems that use MIPS have almost as high performance demands as a desktop or server. And currently the highest performance core is a POWER 9. But on the other hand you have a few places where x86 Atoms have made inroads as embedded cores, as in the UR robot arms I work with.

But really I think we really do overemphasize the importance of x86 because that's the architectures we have the most experience working with directly.

Smart TVs, Digital Cameras, Thermostats, Wristwatches, Phones, Tablets, Printers, Google Home devices, Amazon Echo devices, TV sticks (Chromecast, Firestick etc), Ring doorbells, security devices, etc, . . .

Anything (like a Printer) with a web based interface, having a micro web server within the device.

There are VASTLY more ARM and other architecture chips than there are x86/64 chips around you right now. Possibly even in the computer monitor you're reading this on. The desk phone in your office.

Just about anything that has any kind of a screen with menu system.

> Digital Cameras

The SD card has an ARM chip, usually, in addition to whatever is in the camera itself.

> agilely developed chips

I feel there's a long way to go there. The economic structure of the industry is against agility because "deployment" remains stubbornly expensive, and the product culture is also much more conservative.

> manufacturing also gets open sourced.

It's one of the most capital-intensive industries in the world, so I don't quite see how this would work? Libresilicon are offering a 1000nm (not a typo) process.

Yeah, it's like open sourcing code for 3D immersive visualisation of deep-water seismic survey data, along with the detailed blueprints for the ROV and survey equipment. Awesome enough, sure, but pretty much useless to me. I can build the software like a boss on my laptop, but since I don't have access to any seismic survey data, a CAVE room to view it in, an oceanographic survey vessel, ROV and associated equipment, etc. that's as good as it gets. And, if I had all that awesome oil industry exploration stuff, I'd probably also have a team of engineers building me software anyway, so I don't need it.

My point? Open sourcing stuff with ridiculously huge capital requirements is not that useful, I guess?

I assume they’re counting them as RISC cores plus microcode that makes them compatible with older x86 CISC designs. Modern x86 is RISC under the covers by any meaningful definition-/and also shares pretty much all the problems.
I don't know why this gets thrown around but it's completely wrong. RISC and CISC are about instruction set architecture. As soon as you have crossed the decoder boundary you are deep into micro architecture territory where the ISA is completely irrelevant because you can use the same techniques regardless of whether you have RISC or CISC.

Now if one would take what you said at face value then it would actually imply that RISC as an ISA is completely irrelevant because it is possible to achieve the same benefits or even beat it despite CISC having the inefficiency of hard to decode instructions and the high cost of a conversion step in the micro architecture. One suddenly realizes that this battle of ISAs is completely futile and the secret sauce is in the micro architecture which is completely divorced from the ISA.

Here are some examples: ARM makes slow ARM chips. Apple makes fast ARM chips. AMD made slow x86 chips in the past but now adopted a faster micro architecture. Intel made Itanium but the chips didn't have any sort of dynamic scheduling so they couldn't deliver the promised performance gains.

Modern x86 is not RISC under the covers.

There’re instructions combining a dozen of math operations and also RAM loads, that on modern CPUs decode into just a single micro-op.

Example: https://www.felixcloutier.com/x86/vfmadd132ps:vfmadd213ps:vf... The AVX version computes x=a*b+pointer[i], for 8 independent SIMD lanes.

If you call that amount of stuff in a single micro-op “reduced instruction set” I wonder what exactly is the meaningful definition that you referred to?

x86 is not RISC by any meaningful definition. RISC vs CISC has always been about architecture, not microarchitecture. Breaking down instructions into microinstructions is as almost as old as the CPU itself and predates the CISC/RISC nomenclature by decades.
I guess if you take into account micros embedded in things like washing machines, kitchen appliances, smart home devices, cars, etc... the figure could get close to 99%.
Not to mention laptops and desktops are getting RISC-based co-processors these days (e.g. Apple's T2 is present in the current iMac Pro, Macbook Pro, Mac Mini and MBA).

In fact now that I think about it, pretty much every SSD contains a controller SoC which is almost certainly RISC, so even in a standard laptop you get at most a 1:1 ratio of RISC:CISC. And modern GPUs (including IGP) would be RISC in a VLIW configuration, if each computation core is counted as a RISC chips the ratio quickly gets ridiculous.

The article specifically points out that Intel/AMD took on board all the lessons from RISC as they evolved the x86 series and now it's pretty much a RISC architecture too.
Most RISC architectures have fixed-length instructions (16-bit, 32-bit, 64-bit, 128-bit), whereby most CISC instructions are variable size. So x86 is not a RISC architecture...
I remember being excited about The Machine [1] from HP:

"The Machine will be a complete replacement for current computer system architectures. There will be a new operating system, a new type of memory (memristors), and super-fast buses/peripheral interconnects (photonics)."

"HP says it will commercialize The Machine within a few years, “or fall on its face trying.”"

It seems later happened...

[1] https://www.extremetech.com/extreme/184165-hp-bets-it-all-on...

While HP's "The Machine" specifically appears to never have gone beyond the marketing phase, I think your excitement about the underlying technologies - silicon photonics combined with nonvolative memory combined with resource disaggregation - is valid [0], and they are probably coming.

You can buy NVM today [1], and building systems for resource disaggregation work is an active problem [2].

[0] https://www.usenix.org/conference/fast14/technical-sessions/...

[1] https://www.intel.com/content/www/us/en/products/memory-stor...

[2] https://www.usenix.org/system/files/osdi18-shan.pdf

HP long ago rebranded "The Machine" to be just a powerful regular computer, since they haven't been successful in making viable memristors at scale.

So they will deliver it, it just won't be anything like what they promised.

Later always happens.
Sorry for the typo :)
I think back to the old Cat Stevens song "I Want To Live In A Wigwam", except now I think maybe one day I'd like to live in a Faraday cage.

Computers, like guns, drugs, and any other invention of man are not inherently evil. All these things can be used for good or evil. Unfortunately, the fly in the ointment is human nature. With the convergence of cheaper but increased computing power and the monetization of personal information, I fear what the future holds. I hope I'm wrong, but it looks to me that humanity is doomed to forever live in a state total surveillance and control. We're seeing it happening already. Just the other day I saw an article that said that Sweden is going to tax people on the miles they drive. The very next day I saw another article saying Los Angeles is planning to do the same thing.

Sigh... I'm glad I'm old.

Every country already taxes people on the miles they drive, as every country has a fuel tax.
A fuel tax isn't effectively a tax on mileage, nor is it an effective tax for offsetting infrastructure costs. An increase in axle weight causes an exponential increase in damage to infrastructure (the American Association of State Highway and Transportation Officials uses a "fourth-power" rule). Increased fuel economy also has unintended consequences leading to fuel taxes under-funding the infrastructure repairs.

You essentially have heavy-duty or commercial trucks that don't "pay their weigh" and hyper efficient hybrids and EVs that don't "pay their way" when it comes to infrastructure costs.

So fuel tax isn't equivalent to a tax on "miles driven," it might be better suited to off-setting air pollution (pure conjecture on my part), but if you wanted everyone to be responsible for the damage they cause to public infrastructure, you would need some weird calculus of axle-weight/mile driven tax.

Or we could decide major roads/infrastructure are an economic public good worthy of paying taxes on.

The difference is pay at the pump or pay via what your car's embedded GPS is reporting. GPS also allows them to know when and where you were speeding, and since Sweden went cashless, they can simply deduct the fines from your bank account. Compliance is irrelevant.

If having a GPS device on your person becomes law, then avoiding the tax by riding a bicycle, walking, riding a horse etc is defeated.

This fear mongering goes on since the days of Henry Ford. Technology has been a boon for many many people. I can't imagine a world with many more people dying or without access to information.
Indeed, since the days of the Gutenberg press. All new tech heralds the end of times.
I'm trying to think of what are some neat computer architectures out there.

Chuck Moore's "Green Arrays" is kinda cool and so is the Parallela board.

Transputer. Hardware multitasking and link-communication and a very compact instruction set.

https://en.wikipedia.org/wiki/Transputer

https://en.wikipedia.org/wiki/XCore_Architecture

SOAR (Smalltalk On A RISC), though the conclusion there was mostly that a plain old RISC will do. I wonder if that is still true today.

Rekursiv OO computer https://en.wikipedia.org/wiki/Rekursiv

NEC dataflow processor. https://books.google.de/books?id=qRrlBwAAQBAJ&pg=PA152&lpg=P...

Never heard of SOAR. It would be pretty sweet though to have a powerful & multi-core chip running a Smalltalk OS that could do something with all the cores. I'd also like to see kOS from Arthur Whitney if he ever finishes it, although I'd never be able to afford any of their products.
I don't think I'd call the transputer "hardware multitasking" so much as "integrated communications network."

For a time the T800 was the top of the FP pile. Not for long, though, and then the long, long, long wait for the disappointing T9k doomed the whole architecture.

I need a group for this .. I love forth array cpus
I just wish I could figure out how to use the green arrays
> As the architects of the Motorola 68000 and iAPX-432 both learned, the marketplace is rarely patient.

I hope this won't mean the Mill has no chance of success, or at least influencing the industry for the better. Every video seems to introduce interesting new ideas, or new takes on old ideas[0].

https://millcomputing.com/

I'd hardly call this a "Golden Age", precisely because of the shortcomings mentioned in the article. Regardless of how you may re-architect a processor you will still end up hitting CMOS limitations in time.

To contrast my fantasy for "Golden Age" would be multiple viable replacements for CMOS that were actively being used in a variety of processors.

Modern arch has various inefficiencies which would be solved if we shifted focus to more parallelism and less complicated processors (maybe something like Amorphous Computing). This requires a different programming model from the sequential, imperative paradigm though.
What specifically is "wrong" with CMOS? Not small enough for you yet? :)
Interesting article with a lot of great historical context. I think a significant part of the tl;dr is that the end of Dennard Scaling and trouble with Moore's law may mean that the best architecture will finally win out, rather than just the one with the best semiconductor design team behind it.

I'm a bit skeptical of the promise of DSAs, though it does seem we're already going that way. Curious what others think on that point.

The article didn't well on Dark Silicon but the idea is that as you can fit more structures on a chip but can't light up them all for power dissipation reasons it makes sense to include more and more specialized structures you only use for some purposes. With the rise of GPUs and specialized co-processor for things like media decoding and encryption we're certainly well on our way there. It would be nice to have an intermediate between the two in more places, like the Hexagon VLIW DSP that Qualcomm puts in its Snapdragon DSPs. And of course there are the even more specialized matrix convolution processors that everybody is designing and NVidia is now putting in its GPU.

I think the real question is if it will make sense to have FPGAs in wider use. Certainly not until the programming model improves...

I agree, my concern is where do DSAs go in a few generations? How many efficiency/performance gains can be had before hitting the same limits hampering general purpose processors today?
A DSA is only going to be an order of magnitude or two more performant than a general computer on any given process node. They'll certainly slow down at the same time general purpose CPUs slow down. The thing is it makes more sense to design and include them in a world where transistors are potentially getting cheaper without getting better because a finite amount of engineering effort will be stretched across a longer timeframe.
Reading this, I had a flash of a question:

RISC makes a lot of sense given compilers and many other possible optimizations?

However, there are increasing trends to put functions right into silicon too. Those frequently replace many instructions.

Will ML tech somehow make better sense of those things, and CISC in general?

>Using parallel loops running on many cores yields a factor of approximately 7.

That depends on the number of cores.

It really is a fascinating time to be alive and aware.

The power of computing is redefining civilization, humanity.

I am getting application error while opening the link. Anybody facing the same issue?
Alot of what they suggest seem to be better solved in the domain of compilers and microcode translation on the fly.
– As announced by Intel on the launch of the new Itanium architecture.
oh snap
Quite possibly! Or maybe at install or link time. Or maybe we're looking at a future where almost all code goes through a JIT engine and you've only got a few normal cores that run the OS that manages everything. Or possible everything will be Javascript[1].

[1]https://www.destroyallsoftware.com/talks/the-birth-and-death....