Also, compare the "zeropage indirect" address mode of the WDC 65C02, which does exactly this w/o involving any of the index registers.
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Oh, nice. I wished for a similar addressing mode in the 1980s. I see they also added instructions to increment and decrement the accumulator as well.
(Actually, what I wished for was slightly different: only the high byte of the effective address would be fetched from zero page, the low byte being the Y register. In this way, one could keep both bytes of the pointer in zero page, LDY the low byte and use my zp indirect mode. The first use of a pointer would cost an extra instruction / 2 cycles, but further uses of the same pointer would be cheaper.)
Notably, the Motorola 6800 has decrement and increment for the accumulator, both of them. It also features an indexed address mode that is somewhat reverse to how the 6502 does it: there's only one index register (X), but this is of 16-bit length and a single-byte operand is added to this. So, while not exactly a zeropage address, with a bit of courage for self-modification we get there…
The 6502 did intentionally away with quite a number of features, but, as it had since become evident that it was a computer CPU, WDC added (back) for the CMOS version some of what was kind of missing for this application.
(The thing I'm probably missing most on the 6502 is a sequential-shift or barrel-shifter, shifting/rotating by multiple bit positions at once. This would be so great for games, graphics, encoding and decoding… Sophie Wilson had the wisdom to opt this into the ARM architecture.)