There isn't any dedicated instruction decoding for these "illegal" instructions, at all. Generally, just two regular instructions happen to be executed at once. Some of these work out reliably and somewhat useful, others result in the processor becoming stuck (so-called JAM or KIL instructions). Some others kind of work, but don't yield any external result (much like a multi-byte and multi-cycle NOP), e.g., if we try to what would amount to store a register with immediate address mode. (Storing doesn't set any flags and there is no viable write address, therefore there isn't any external result to this operation.)

Generally speaking, there are no legal opcodes with both lowest bits set and the decoding triggers for both instructions with either the lowest or the second lowest bit set. (There are some more outside of this pattern, but these result more often in a "jammed" CPU than not.)