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Headline could read: "RISC-V adoption is 'inevitable' according to RISC-V advocate at RISC-V conference to people who are invested in RISC-V who had come to hear about state of RISC-V adoption".
I'm curious where the data is to support the argument.
I am struggling to see the adoption appetite outside of niche applications where licensing costs of existing architectures are a key barrier.
Currently, RISC-V actively shows up in embedded - especially "deep embedded" like specialized ASICs with embedded MCU cores.
It's often seen displacing things like 8051, ARM Cortex-M0, ARC/ARCompact, Xtensa and oddball fully custom cores.
It also starts to show up in low end Linux SoCs - often, again, purpose-specific ones, like SoCs for IP cameras or other single purpose consumer electronics like robot vacuums and drones.
None of those are sexy "high end" applications, like laptops or smartphones, but the adoption is real.
I can only hope RISC-V's displacement of ARM at the low end will force them into competing more at the high end in servers / high end consumer hardware.
I believe in microcontrollers its already pretty ubiquitous , see their utilisation by WesternDigital with their SwerV core thats already shipping since 2019.
At speeds and complexity comparable to desktop/server cores from Intel/AMD they are still lagging in perf though improving as more cores get deployed.
Also to add into the mix the whole geopolitics with non-US players hedging.
So potential is there will just depend on what will be the base case like Windows was for Intel.
Firmware & systems dev here, ARM still dominates in the microcontroller space. There are some niche offerings from major vendors but again they are niche. Espressif is the sole exception with their newer ESP32-C series chips, but they can get away with it due to their massive HAL. ARM Cortex is still the standard because there’s a decade or two of inertia behind it.
An apt comparison would be C vs Rust. Yes, Rust may be growing in market share, but C still dominates.
Non-US hedging will be big for RISC-V in the future, but the geopolitics can also cut the other way. E.g. US banning US companies from using Chinese RISC-V chips, to protect their domestic players. Especially now that intel is partially state-owned.
Nvidia has shipped over 3 billion RISC-V cores: https://riscv.org/blog/how-nvidia-shipped-one-billion-risc-v...
Tenstorrent is shipping RISC-V chips made on Samsung 3nm node: https://tenstorrent.com/newsroom/tenstorrent-sets-new-perfor...
Note that Jim Keller (heavyweight in the world of CPU architecture) is their CEO.
Qualcomm recently acquired a RISC-V startup. https://www.qualcomm.com/news/releases/2025/12/qualcomm-acqu...
Plus they're eating ARM for low-end devices (IoT).
RISC-V is going to become the Linux of chips, for the same reasons Linux became big. It might honestly come even faster as Microsoft isn't tethered to any chipmaker these days.
"Inevitable" is in keeping with the brash, larger-than-life marketing angle the whole RISC-V space has adopted. Everything is superlative-themed. "World's first", "world's best", "highest performance", "unmatched", "unleashed", "industry-leading", "gold standard", "world leader", "disruption", "revolution". I don't think it's something that should be taken literally.
IMO “State of the union keynote argues” makes it pretty clear that this is a perspective from the person giving the keynote. The article title isn’t reporting it as a matter of fact, but as an argument.
Google is pushing it in embedded (OpenTitan/Ibex).
I'm working on making SIMD better in Dart. Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all.
This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?
I guess it would be fun seeing all my SIMD-fiable use-cases become orders of magnitude faster on RISC-V, too, but I sadly never hear anything about machines that use RISC-V.
> Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all.
On the one hand, this will be quite straight forward, but on the other hand quite disappointing.
Afaik Dart has a 128-bit only SIMD abstraction (so not performance portable by default). Since the base "V" extension mandates a mininum vector length of 128-bit, you can trivially make codegen work for all vector length, by simply setting vl to 128/elementwidth.
But as with x86, if your native hardware vector length is larger than 128-bit, you leave performance on the table.
> This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"?
I'd recommend using qemu for initial testing.
Hardware wise, the cheapest option is the orange pi rv2, which has 8 SpacemiT X60 cores, which are in-order and support 256-bit RVV. The Zhihe A210 is also interesting, but way to expensive for what it is.
If you have a higher budget, I'd recommend the SpacemiT K3, which is the fist RISC-V SBC with RVA23 support. It is has 8 SpacemiT X100 4-wide out-of-order cores, with 256-bit RVV.
You can try to re-vectorize the code for larger vector size.
There are several RISC-V machines. In the microcontroller world it's becoming more and more usual, but those won't have RVV. SpacemiT K3 based machines are probably your best bet when it comes to RISC-V processors with SIMD support. There are several manufacturers: Milk-V with the Jupiter II, Sipeed, Banana Pi, ...
The THead C906 core is full Linux-capable but is microcontroller-adjacent and has an early draft version of RVV that is different in details but has the same flavour (and at least some code is binary-compatible with RVV 1.0). Recent GCCs RVV intrinsics compile to either RVV 1.0 or the 0.7 draft (named XTHeadVector now) so if you're programming at that level they're compatible. Milk-V Duo starts at $3 for a tiny board with a 1.0 GHz C906 running Linux, a 700 MHz microcontroller config C906 (no MMU etc), and 64 MB RAM. Well, I paid $3 ... then they were $5 for several years and now I see $11 at arace.tech. There are also 256MB and 512MB versions, with the larger one also having an Arm A53 core.
That's actually got full 128 bit SIMD with all data types supported up to 64 bit int and FP.
You can also buy bare CV1800B and SG200x chips (Sophgo bought original designer Cvitek and enhanced the design)
You can buy a RISC-V mainboard for the Framework Laptop, and it's relatively cheap (£170)
https://frame.work/gb/en/products/deep-computing-risc-v-main...
OrangePi RV2 might qualify for fun?
There are various emulators available that support RVV but they aren't going to be especially useful for benchmarking/profiling.
So you can write code that works, but it's probably a few more years still until high performance RISC-V cores are easily available for profiling RVV code and finding the best code.
Progress is steady though - it will happen soon. It's not one of those "year of desktop Linux" things.
>Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?
Multiple boards based on the RVA23 spacemiT K3 are shipping as of recently.
They are usefully performant. Comfortable webbrowsing and playing 4K youtube without issues sort of fast.
>This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?
I would also be interested in RISC-V emulators etc.
While the consumer market is still years away from widespread RISC-V adoption, if you pay attention to the embedded / MCU market (especially Espressif & co) you will indeed come to the conclusion that RISC-V is inevitable and software maturity will probably come from these early adopters.
Go!
I wouldn't bet against software inertia.
x86 only missed the mobile market because of multiple bad business decisions, otherwise ARM (and RISC architectures overall) would have been relegated to more decades as backwater architectures.
There is nothing inevitable about anything as Apple controls its own silicon very tightly, Microsoft hasn't even really transitioned away from x86, and Android probably isn't very keen to transition away from ARM.
Now, embedded markets are different but they've always been different and the number of embedded programmers is dwarfed by non embedded programmers and regular users will for a long time never install an app on RISC-V.
It's an interesting journey, let's see where it takes us in 20 years.
Krste wasn't even saying anything controversial. It's obvious that manufacturers will use the cheapest (free) least legally entangled option, and that this adoption will happen first amongst those with the tightest margins. And - Clayton's law[1] - it will eventually extend to the rest of the market (albeit over a very long time).
> “CHERI is not an extension; CHERI is a new base,” Asanović clarified to the keynote audience.
> Addressing concerns that creating a new base ISA might fracture the open-source community, Asanović offered a devoted defense to EE Times. “CHERI is too invasive to be a simple extension on regular RISC-V, and so needs a new base ISA for that reason,”
To me it sounds like they're creating RISC-VI before RISC-V even winning the market.
What a circular argument that avoids answering the question. How does "it needs a new base ISA" address the concern about "might fracture the open-source community" even one bit? Why does the "journalist"/writer call that reply "a devoted defense", in what world is that any sort of defense?
I've been trying to get access to CHERI for quite a while - I have a background in hardware security so was very curious to have a play. But only 'approved partners' are allowed to have access... guessing even in projects like this, Security through Obscurity still reigns.
There's zero chance CHERI will go anywhere, I wouldn't worry about it.
If we go by Apple's architecture history we will get a new one, maybe RISC-V, in 2036.
m68k (1984) > PPC (1994) - 10 years
PPC (1994) > x86 (2006) - 12 years
x86 (2006) > ARM64 (2020) - 14 years
ARM64 (2020) > ??? (2036) - 16 years
Except that ARM is pretty much theirs, or at least they have complete control over it, which they never did for any previous arch. They also handle chip production directly. Nothing in RISC-V could be worth more than what they can already wring out of ARM without having to migrate.
Everything pushing forward RISC-V is a good thing (this time I get it right...)
I code RISC-V assembly almost everyday, beyond the major point that it is a NON-IP-LOCKED ISA (unlike arm and x86-64), it feels like it does 'sweet spot' nearly all the time. Namely, I am more into binary specifications which means, if RISC-V is zapped one day, we still have some RISC-V byte code and port to an IP-LOCKED ISA is reasonable.
The hard part: _really performant_ micro-architectures for server/desktop/embedded/mobile on latest silicon process.
The harder part: getting much binary-only 'critical' software running there (for instance desktop video games).
And the super hard part: big mistakes _will be made_, and it is going to hurt ooofely.
I have no experience with ARM, but after decades of x86, low-level programming or OS development with RISC-V is such a breath of fresh air. Writing a simulator from scratch for the base ISA is like two days of work tops. I am using RISC-V as the instruction set for a bespoke virtual machine: why design a ISA when RISC-V is simple and modular? Bonus: all compilers can now target my VM.
It will accumulate cruft over the years like all other platforms, but right now, it is a joy to work in.
It’s not just for fun, but I’m betting on it because I hope Europe will finally build its own chips, and there is a good likelihood they will choose RISC-V over ARM; expertise in that field for EU developers might soon be a plus.
It was a decent little talk this one. Now that we are seeing RVA23 chips available we are starting to at least see a lot of software packages actively compiled for the platform. They aren't optimized much at all but they do run.
I am cautiously optimistic about the future of RISC-V. It is likely to start biting at the heals of ARM in another 5 years or so, and having no licensing fees makes it very attractive in that sense. Qualcomm and Apple will be very interesting in avoiding as many ARM licensing fees as possible even if initially in embedded systems. But it also allows for a lot of hardware to be locked down just like ARM and so it might not be so great for the end users. Time will tell.
All I know is that I look for the seeing Apple Silicon 2 launching in 2036 using this stuff. ;)
5 years ago there was a req on the Apple job site for engineers familiar with RISC-V.
https://riscv.org/blog/apple-exploring-risc-v-hiring-risc-v-...
Can you elaborate on
> But it also allows for a lot of hardware to be locked down just like ARM
We still have to see a RISC-V implementation that comes even close to the performance of ARM
I thought Apple has a special deal with ARM as they were an early investor?
Why can't anyone build a performant RISC-V cpu?
The SpacemiT K3 seems to be the fastest available right now, and it's basically a joke. https://www.phoronix.com/review/spacemit-k3-pico-itx/3
I'm starting to get the feeling that there is something fundamentally broken in the RISC-V specification that fundamentally limits performance.
https://tenstorrent.com/newsroom/tenstorrent-sets-new-perfor...
It's already happening.
If you mean for consumer hardware though, it'll probably be a few more years. Even ARM hasn't really taken off for Windows. Hard to overcome developer inertia for consumer devices, whereas for datacenters it's easier as all the apps are custom anyway.
> Why can't anyone build a performant RISC-V cpu?
"They" can, and are. Many "they"s.
> I'm starting to get the feeling that there is something fundamentally broken in the RISC-V specification that fundamentally limits performance.
Then you are at loggerheads with many legendary ISA and chip designers.
> I'm starting to get the feeling that there is something fundamentally broken in the RISC-V specification that fundamentally limits performance.
RISC-V is an objectively bad ISA design (a resell of MIPS dropping some of the most ominous features, then trying fix the code density issue with billions of extensions), but x86 is way worse and it didn't prevent Intel from making performant implementations. And RISC-V is certainly not bad in the way that would limit performance (well, maybe code density, but it's not the major issue).
The reality is, ISA matters very little for CPU performance. What really matters a lot is the memory subsystem and interconnect. I. e. good DRAM controllers IP are pricey - way more pricey than ARM cores AFAIK. Not a problem unique to RISC-V - i. e. Altera memory controllers used to be shit as well, not sure if Intel changed anything.
And another issue - there doesn't seem to be all that much money in CPUs any more. Look at ARM's history with high-performance sector.
>and it's basically a joke.
Look up the fab process node and die area of that chip, and think again.
RISC architecture is gonna change everything
My money is still on ARM. They, and their clients who produce the actual processors, have options to fight back if RISC-V ever becomes a serious competitor for, say, smartphones.
What options are those? Anything they do that makes ARM better/cheaper for consumers makes RISC-V a win, even if it never reaches mainstream adoption.
Lol they tried to sue one of their biggest customers (Qualcomm) and lost... No one wants to deal with ARM, the licensing fees are insane, etc...
RISC-V is inevitable the same way Linux and open source were, because companies like Qualcomm, Google, Amazon, MediaTek, etc... would all be better off not paying ARM, all else being equal.
Risc-v bexomomg a competitor is bemeficial for ARM's clients as it gives them leverage in price negotiations, which they don't have at the moment.