[not an expert so I could be totally wrong] I was also just talking about the physical space. Even if the machines on the entire line have to be replaced it still probably makes sense for a company to transition in situ - displacing the old line. There's the lease for the land and building, people's commutes are structured around a certain physical location, air conditioning and electricity are already there, etc... It's not just the big expensive machines that make up the fabrication - it's also the entire structure that makes that production happen.
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Even if they need to replace every single lithography machine, there are a lot of other machines that probably don't need to be replaced for any given upgrade.
Like everything related to it being a clean room; All the logistics robots which move wafers around; All the machines that deposit layers of material like CVD/AVD/Sputtering; The various machines that do the actual etching; The furnaces; The inspection and quality control equipment;
Also, absolutely everything to do with dicing and packaging. But that's usually already at another factory (often a completely different company) due to how process agnostic it is. Same applies to growing and prepping the silicon wafer.
That is somehow inaccurate. DDR5 has significantly more challenging requirements.
The inspection and quality control equipment is one of those that you can't just reuse without careful transitioning. DDR5 has much higher speeds, on-die ECC and all sorts of complications DDR4 doesn't have.
I'm not even sure inspection and quality control is done at the fab.
At least with logic ICs, they either testing/QC/bining as part of packaging (before dicing), or even have factories that specialise in just testing/QC/Binning. Such fallacies need to be flexible enough to deal with thousands of different IC designs, and there is no reason to tie them to a given process node.
I guess with memory, there are only three-ish designs (DDR, LPDDR, HBM), so maybe it does make sense to integrate testing/QC/binning into the fab.
But I doubt they would have any trouble switching it out.
> packaging (before dicing)
packaging before dicing? That makes no sense.
IMO, dicing counts as part of packaging. So before the dicing step of packaging.
Each die on the wafer is kind of different. Light is not all the same, usually dies on the center of the wafer are better and it gets worse as you move outside.
That plays out in binning, and it involves even design (laying out dies on the wafer such as the imperfections produce still usable ones, perhaps with some stuff disabled or running on lower specs).
So, there is some sort of QA at that point (seeing how bad the bad dies are), which also feeds into adjusting following batches.
DDR5 is already more complicated at that step. As I mentioned, it has ECC on the die and all other sorts of complications. A clean reuse of a DDR4 process seems unfeasible. There's significant investment needed for DDR5 even for what you consider "dicing".