back
25 comments
The HN article title suggests a contradiction where there isn't one. The instruction set is just the spec -- the high-level contract that the silicon must implement, with many important details like cycle counts per instruction left unspecified. It implies very little about how you would actually implement the inner workings, which could be done in an almost infinite number of different ways (including simulating them on some completely different architecture). Compare "How do you sell a calculator design when the rules of arithmetic are free?"
RISC-V is pretty unoptimisable though; the industry has had its fair share of pretty lackluster MIPS and MIPS-like clones in embedded, and they've been mainly high-volume low-cost "cheap and good enough" SoCs. To be competitive with ARM and x86 you really need higher code density and better, more complex instructions.
To be competitive with ARM and x86 they need a talented design team creating fast and wide cores on a modern node. (which I expect to take a decade at least)

For the vast majority of non-number-crunching code any theoretical difference between instruction sets vanishes in the noise of core design.

RISC-V has higher code density than Arm and x86 and all three have a comparible uop density, but RISC-V has a slightly higher average instruction count. What more complex instructions are missing?
> RISC-V is pretty unoptimisable though

Is it? So there's no scope for different levels of pipelining, out-of-order execution with various numbers of execution units, branch prediction of various levels of sophistication, L1 cache of various amounts, multiplication and division implemented in various ways from slow but low chip area and power consumption to fast with high chip area or power consumption? Because those are all things that have major performance impact even on plain "RISC-style" x86-64 code.

Genuine question: what makes ARM64 a denser ISA compared to RISC-V ?
They tried to squeeze all they could into 32 bits, which is why there are things like load/store pair, bitfield extracts, etc.
By adding a bunch of IP blocks that do stuff the open ISA doesn't, like peripherals or multicore processing. It also helps if you can make it high throughout, low latency, or low power by adjusting some "knobs".
The article is quite weak, to be honest. Which is a shame, sillicon IP design is quite an interesting domain and it would deserve better coverage.

I was pleasantly surprised it's a startup done by two of my conationals.

Thanks, how could I have made it stronger?
The credibility point is the most interesting part of this. In semiconductors, having a good design seems secondary to convincing customers that you'll still be around to support it years later. RISC-V lowers the barrier to building a CPU, but i'm not sure it lowers the trust barrier nearly as much.
I'm not so sure of that. Don't companies often buy a million of a chip and then that's it? Famously the MacBook Neo was created to get rid of some stockpile of old chips Apple was sitting on.
It depends on the industry. High-volume consumer electronics is often like this (they're making this year's product, they roughly know the demand, they'll be redesigning it in a year or two), but industrial electronics generally wants to know that they will still be able to buy the parts in 10 years, at least (a design or even a single unit can be in active use for decades).
I think this story is the exception. The supply chain time for hardware is so long, designers are picking their chips out months and years in advance. So you really do have to trust that the supplier will be around to support the hardware in a few months or a few years.
numerically, most companies are not in cutting edge rapid product cycle consumer gear like apple, they instead want to buy 1000/year of the same part for a decade (or maybe gradually better, compatible equivalents)
also companies try really hard not to keep huge stockpiles of parts as part of lean manufacturing
Separately from my other comment, European companies seem to have a credibility problem no matter what they do or how well they do it, just because they're outside of the good old boy's club that is Silicon Valley. When's the last time you heard some praise for OVH or IONOS Cloud?
I think the EU is making credible attempts to change this.
Not really. It's a capitalist economy, they can only regulate what exists, not bring things into existence. The best they can do is offer grants to those who apply for them.
Umm I would say working physical samples is pretty important.
- stupid question

- if you wanted to build a 1nm process cpu from scratch without china and taiwan, where do you start

- what do you need?

- what is the timespan

- how much money?

- what kind of expertise?

If you intend to build a physically chip, short answer is you don’t. You can’t really build it without Taiwan at this point.
>"Founding a company is a confidence game in the honest sense of the phrase: you have to get people to believe in something before it’s true, and then go make it true."

An absolutely spot-on observation about the true nature of Silicon Valley, Venture Capital, Angel Investors, Tech Incubators and the whole surrounding early-investment (high risk, high financial reward if successful) ecosystem...

You sell the use case and support.
Fair point, that is pretty much the answer I’m finding for most open source solutions in hardware, you make your money on implementation and support.