We are in fact working on an LLVM backend right now.
This will generate Mill IR, which will be 'specialised' on-target so will run on all Mill family members.
Thus there's a disincentive for Intel to release their optimizer's tricks: not only are at least some percentage of the optimizations applicable to their competitor's microarchitecture implementing the same ISA, but they probably reveal various Intel CPU internals that Intel consider trade secrets (similar to the argument against open-sourcing 3D drivers and shader compilers).
Mill is not going to be locked into a bitter head-to-head battle with someone else trying to implement the same ISA better (at least not for a long time), so there's no incentive for them to hide their CPU's internal optimizations and no competition for which compiler optimizations could be generally applicable.
Java code does not depend on hardware memory models but a defined memory model. Much easier to validate your jvm is valid than all C programs that clients might want to run.
You could even have mills cpus on PCI cards in a standard X86 machine, where the java executable passes the program to the the mills on the PCI to run. A bit like how Azul and their vega machines worked (although those where network attached).