You wouldn't need to care of the actual generated code. It would be generated just and only for the currently running processor and memory subsystem.
> I'm wondering how feasible it would be to "rewrite" series of scalar instructions to a smaller number of SIMD alternatives either as part of the front end decoder or as something that continually optimizes the stream of opcodes in the cache.
Right. First you'd need to have available instruction encodings -- for x86, they're in very short supply. Secondly this would increase the amount of state that needs to be stored to memory and restored when context switching between threads and processes, unless the support would only be available to the operating system and opcodes are shared by all thread contexts.
You can achieve this by JITting already, without the context switching overhead.
On the positive side, this would ease instruction cache pressure.