I wonder if, unlike Transmeta, they will let you run native code on it too. Transmeta could not do it for technical reasons. As far as i know, the underlying arch was designed ONLY as a JIT target, and did not even have protected memory as such. Memory accesses were translated to different instructions (one privileged and one not) based on context of translated code.
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Not sure about this Russian chip but in the case of Transmeta and Nvidia Denver (and to a lesser degree, Intel x86 µops), writing the "native" code directly is not beneficial in any way.
The whole point is that the JIT compiler running in the CPU can make dynamic optimizations that's somewhat similar in nature to doing branch prediction and other optimizations modern CPUs do.
The native code executed by these CPUs is a poor target for static compilation. Without runtime data about which branches are taken, which memory locations are touched, etc, it is not possible to generate code that outperforms the built-in JIT or can compete with more traditional CPUs.
And besides, the JIT frontend in these chips is rather cheap in terms of power and performance.
You can use native code. Problem is that you need a compiler for it and so far optimizations is their main issue.