It seems to me that the aim of taking 10 years to build a supercomputer that is only 20 times faster than the current one might fall a little short if it's aiming to take the top spot.
Also the FLOPS measurement is a bit broken: It focuses on dense linear algebra problem, for which GPU or other accelerators boost the results easily. If all you plan to do is running simulations that are easily parallelized on GPU it is fine, for other types of programs it is hard to tell which is the fastest supercomputer.
* France is also ordering a would -be top 10 supercomputer : http://www.hpcwire.com/off-the-wire/the-cea-agency-and-atos-...
x20 ought to take about five years and a half.
I have have read last 10 years that Processing is a lot more cheaper did by network of computers and clusters, instead of a expensive supercomputer that also demands an appropriate building and infrastructure.
[1] https://www.whitehouse.gov/sites/default/files/microsites/os...
This is because the supercomputer community has long ignored the Internet-style of computation (MapReduce etc). But most of the new generation of scientists are adapting their codes to this new style, because dollar-for-dollar they can get more throughput than the classic style machines. Classic machines invest heavily in low-latency communication and typically require APIs like MPI to achieve it, while Internet HPC just uses well-designed TCP-based socket communications.
Building dual-design systems like this- especially when the community has little or no skill at building NG Internet HPC systems- is likely to produce a system that is good at few things.
Instead, build two systems. One is the largest (but not necessarily exaflop) you can afford and is a classic supercom[puter. Then, for the second, hire some datacenter designers from Google/Facebook and have them build a modern HPC cloud design.
The biologists will flock to the second one; they have long been underserved by the DOE supercomputing community.
Massively distributed systems do not get much benefit from low-latency interconnects. Massively parallel systems do, and in particular, it is a "throw hardware at the problem" kind of solution that helps cover for the fact that virtually no software designers can engineer efficient, non-trivial, massively parallel systems. MapReduce is a distributed model; outside of some trivial cases, it is a poor parallel model. And while the HPC community has a much better understanding of massive parallelism than the Internet-scale systems community, the HPC community largely doesn't grok massively distributed systems in the way that someone working on Google's infrastructure would.
I benefitted from having spent several years designing software for both HPC and Internet-scale systems. They are not fungible, and both communities grok things that the other is oblivious to. Even within the HPC community though, the number of people skilled at the design of massively parallel software systems is quite small, much smaller than people that know massively distributed systems.
You do not need two systems, you need one system and more people that have figured out how to design massively parallel software -- the real problem. It is difficult to overstate just how rare this skill is even within the HPC community.
I would argue that the community of people who actually have the skills to take advantage of the interconnects in a classic HPC system is vanishingly small, and in consequence we've overbuilt them on an epic scale.
Allow me to vent. I had the good fortune to have a login on a "petascale" HPC system, and access to an allocation of hours.
The /scratch filesystem would fail weekly, which killed everybody's jobs. If you had a big run going when /scratch failed, you lost everything. Scratch failed so much because the models that were being used often did wildly inappropriate amounts of file IO --- debugging print statements, detailed intermediate calculations, excessively verbose output --- that worked all right in development but when run in parallel brought the filesystem to its knees.
Furthermore, the login nodes were almost unusably slow because of all the Python and Perl post-processing scripts running on them. This isn't even a matter of users being cheap with their hours --- post-processing would have been a tiny fraction of their allocations. Instead, it's that many of them gave no thought at all to how the post-processing might be structured and run through the batch scheduler, and saw no downside to abusing the login nodes for that purpose.
In conclusion, I can attest to at least one HPC system that was badly mismatched to its users' needs and level of sophistication, despite allocations of hours being awarded only to a small number of researchers from across the country through a highly competitive process. Building these things serves national and institutional pride far more than any utilitarian interest.
Many argue that an exascale computer can only be cost efficient if the communication capabilities scale highly sublinearly with the computation done in the subsystems [1]. In particular, you can't move the data, and new algorithms are needed that can deal with data that is arbitrarily distributed. This is quite challenging and unfortunately the theoretical computer science community seems to have decided that distributed memory algorithms have been covered since the 90s and are not worth their time. Yet they ignore the progress that has been made in other models of computation since, and many algorithmic improvements of the last decades are not applicable. It is high time to develop communication-efficient algorithms for the basic "toolbox".
I guess what I'm trying to say is that you can't just throw MapReduce at an Exascale machine and expect it to perform well. Instead, you need an environment that is rich in primitives that have been implemented in a communication-efficient way. It's faster and cheaper to spend a little more effort on local communication if that allows for reduced communication volume (and/or the number of connections that need to be established!).
The issue I have with the MapReduce approach is that it doesn't particularly care about data locality. Thus it is very hard to achieve communication volume sublinear in the input size, which is absolutely deadly in an exascale setting.
I also understand the frustration with MPI, it is a very low-level API focused on data movement. It can be rather frustrating to use, but there do exist tools to make it more fun (Boost.MPI with C++11/14 is an excellent example). That said, with a well-engineered set of algorithmic tools, ideally you wouldn't need to use low-level MPI calls at all. However, MPI still remains a useful tool to implement these things.
Exascale computing requires us to rethink a lot of things.
[1] http://www.ipdps.org/ipdps2013/SBorkar_IPDPS_May_2013.pdf Shekhar Borkar (Intel), Keynote presentation at the 2013 IEEE International Parallel & Distributed Processing Symposium
So given Moore's Law, by the time it's finished in 2025, it will be 50 times slower than 2025's fastest?
Yes, yes, Moore's Law is slowing, transistors on a chip =/= flops, etc. Still seems like they'd want to aim higher than 20x in 10 years.
Therefore, even if the raw performance in terms of FLOPS sound similar, the two systems will have widely differing performance on real workloads.
Now I am curious what is the fastest single processor?
http://hwbot.org/submission/%202615355
I happened to catch an overclocking competition being streamed on Twitch one late night many months ago. It was really interesting to see more about the methods and techniques involved and how the competitions work.
Exascale is power-hungry so power must go way down and efficiency of calculation way up.
edit: Actually, in the scenarios you'd use a supercomputer for, the added latency and overhead (shoddy servers, network, etc.) would most likely make the run time orders of magnitude higher.
U.S. and other countries have been in a race for exascale. The thing holding us back isn't funding or political will: exascale is so ridiculously hard that it requires fundamentally different architectures. The main issues are making our CPU's do more work, eliminating memory bottlenecks, and dramatically improving energy efficiency of both. It's just very tough, technical challenges that might also have to operate on process nodes that are themselves tough.
Rexx Computing is one attempt whose founder posts here a lot [except in one thread dedicated to it lol]. I'm curious if any other exascale researchers read HN and can post their concepts as it's probably interesting stuff. Here's some links for readers interested in this stuff.
LLNL gives data on exascale and its challenges https://asc.llnl.gov/content/assets/docs/exascale-white.pdf
Also describes problems but skip to Venray's TOMI approach http://www.edn.com/design/systems-design/4368705/The-future-...
Rexx Computing's approach http://www.theplatform.net/2015/03/12/the-little-chip-that-c...
Intel's relatively conventional approach http://www.exascale-computing.eu/wp-content/uploads/2012/02/...
Architecture from Univ of Texas and NVIDIA https://www.cs.utexas.edu/users/skeckler/pubs/SC_2014_Exasca...
Boise exploring non-Von-Neuman with ParalleX http://cswarm.nd.edu/news-events/assets/PSAAP_II_Kick-off_CS...
Same group enlightens on details that all fight with http://sites.ieee.org/boise-cs/files/2015/04/Thomas-Sterling...
Bonus: 1,000 core, cache-coherent, optical interconnect. Sort of thing might be useful in exascale. http://dspace.mit.edu/openaccess-disseminate/1721.1/67490
Have fun with these. Submit a link if I left out any chip architecture in exascale race that's pretty cool.