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"JIT" techniques were pretty common. Well, first write code to memory and then run it. Often used for drawing lines etc. Simplest implementations just modified code in memory, more complicat…

From the article: > The only way to get an 8-bit 1.44Mhz machine with 64K of memory It was below 1 MHz, I remember there were 63 microseconds per horizontal line (PAL). So the clock frequency must …

Nope, 31 days uptime on the NAT router.

Artificially disabling ECC (error correcting) SDRAM support is very disappointing. In my experience ECC significantly improves stability. Laptops (without ECC RAM) crash a few times per year, desktops…

What I get is very similar (newest Chrome + Yosemite): Detected OS = Mac OS X [generic] HTTP client = Opera 15.x-18.x (User-Agent string is fake) Network link = unknown Distance =…

So, it's otherwise automatic, except I just have to write a selector routine that tries to decide the best performing routine to run at runtime and implementation for each individual case with va…

Any references about this compiler?

That's why I feel dynamic code generation is the future. JIT. It's madness to write high performance code to take CPU [1] and DRAM [2] specifics into account. It's easy to write somethi…

Image processing, etc. stuff I sometimes write seems to benefit pretty linearly from wider SIMD registers, like in AVX2. It'd be useful to get up to a cache line wide SIMD registers. Cache line i…

Good if compilers are that smart nowadays. Just a few years ago I did see two branches in a very similar piece of code.

That can be very expensive operation. Potentially two branches, not counting return from subroutine.

Yup. On pretty much any architecture I can think of, a CMP is exactly like a SUB that does not store result, but sets only flags.

Let me guess. 8192 byte buffer and assumption in code that <=0 [byte count/-1 error] from read() means read error. Sometimes you will get zero bytes read return values. Like when there really …

20-30 years ago, x87 math processors were on a different chip. L2 SRAM caches were also on a different chip. 7 years ago memory controllers were on a separate chip. Maybe 20 years from now, CPU needs …

Similar story here, and I don't even bother complaining anymore. The product is perfect. My fault, that Wifi doesn't finds no APs (fixed now in Yosemite), Bluetooth works occasionally (bette…

In that case my 4 core is really -- waves hands -- a 576 core system. 4 cores, maybe 2 AVX 8-wide instructions execute 2 * 8 * 4 and maybe 3 stages are in flight. And 3x the clock. Or something. So …

Right, I should have mentioned GPUs have a ton of hardware threads. Then again, they have to, GDDR5 memory access can take a microsecond . Try latency like that on a generic CPU, hyperthreading or no…

That GPU has 12 cores, in the same way a desktop CPU has 4 cores. Number of units with concurrent independent execution flow. Very wide and a lot of execution resources yes. Maybe even 5x computing po…

Well, don't set NUMA to interleave! Instead set all of first socket's memory first, then all of second socket memory, etc. 2 MB/1GB pages (don't want TLB miss every 4kB!). DRAM wis…

It's likely GPUs are slower than CPUs for spatial data structures. Getting the data to GPU and results back takes just too long. Point in polygon is also very branchy in general case. GPUs are re…

A lot is lost in the translation when it comes to OpenCL. Current nVidia and AMD GPUs are just wide SIMD machines, just like current x86 cores. GPUs are just just wider and with much less cache, slowe…

Gotos are nowhere near as hard to debug as exceptions.

"Lawson’s contributions too as he was a real comedian with lots of semiconductor experience. He could have invented the WOM concept. He did invent the “SCROM”. I doubt if any one else knows what…

For example 1TB Samsung drives delivered 100 MB/s over 5 years ago. Most 3.5" disks delivered as much.

Not much information about the CPU. It says only "ARM Cortex-A9 quad core @ 1.6Ghz". Makes me worried it's again one of those Allwinner or Rockchip cases. In other words, a lot of cores…

Why are you upset with it? Without having seen his comment, so far parallel computing has brought little to consumer end users. Out of that little, by far the most of the benefit is about graphics pro…

Nearly every phone I've seen in last few years has a WiFi access point feature. So shouldn't be a big issue even for apartment dwellers.

As I previously had no idea what Rr is, I googled it a bit. So for others: It's a tool to record executable execution and play it back later for debugging purposes. http://rr-project.o…

Have you benchmarked that? Last I tried some not-so-rigorous microbenchmarks, *printf beat C++ << streams by a factor of 3 on msvc 11 (VS2012).

Your write up was pretty interesting. Especially the instruction mixes, LFENCEs of all things helped?! Thanks. I haven't tried optimize fill / copy rate since late nineties. Getting the last…